rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a adp3302 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 world wide web site: http://www.analog.com fax: 617/326-8703 ? analog devices, inc., 1997 high precision anycap? dual low dropout linear regulator functional block diagram (1/2 is shown) q2 thermal protection gm q1 cc bandgap ref driver r1 r2 adp3302 out in err sd gnd adp3302 7 6 2 out1 in 1 5 err 330k w e out 0.47? v out1 on off 0.47? 8 v in gnd sd1 3 in 4 out2 0.47? v out2 sd2 figure 1. application circuit features high accuracy: 6 0.8% ultralow dropout voltage: 120 mv @ 100 ma typical requires only c o = 0.47 m f for stability anycap? = stable with all types of capacitors current and thermal limiting low noise dropout detector multiple voltage options thermally enhanced so-8 package applications cellular telephones notebook and palmtop computers battery powered systems portable instruments high efficiency linear regulators general description the adp3302 is a member of the adp330x family of precision micropower low dropout anycap? regulators. the adp3302 contains two fully independent 100 ma regulators with separate shutdown and merged error outputs. it features 1.4% overall output accuracy and very low, 120 mv typical, dropout voltage. the adp3302 has a wide input voltage range from 1 3 v to 1 12 v. it features an error flag that signals when either of the two regulators is about to lose regulation. it has short circuit current protection as well as thermal shutdown. the adp3302s enhanced lead frame design allows for a maxi- mum power dissipation of 630 mw @ +70 c ambient temperature and 1.0 w at room temperature without any external heat sink. anycap? is a trademark of analog devices, inc.
C2C rev. 0 adp3302Cspecifications parameter symbol conditions min typ max units ground current i gnd i l1 = i l2 = 100 ma 2 4 ma i l1 = i l2 = 0.1 ma 0.4 0.8 ma ground current in dropout i gnd v in = 2.5 v 1.0 2 ma i l1 = i l2 = 0.1 ma dropout voltage v drop v out 98% of v o , nominal i l = 100 ma 0.12 0.2 v i l = 10 ma 0.05 0.1 v i l = 1 ma 0.02 0.05 v shutdown threshold v thsd on 2.0 0.9 v off 0.9 0.3 v shutdown pin input current i sdin 0 < v sd < 5 v 0 1 m a 5 v sd 12 v, @ v in = 12 v 22 m a ground current in shutdown i q v sdi = v sd2 = 0, t a = +25 c, mode @ v in =12 v 0 1 m a v sdi = v sd2 = 0, t a = +85 c, @ v in =12 v 5 m a output current in shutdown i osd t a = +85 c, @ v in = 12 v 12 m a mode t a = +25 c, @ v in = 12 v 2 m a error pin output leakage i el v eo = 5 v 13 m a error pin output low vo ltage v eol i sink = 400 m a 0.15 0.3 v peak load current i ldpk v in = nominal v out +1 v 200 ma thermal regulation v in = 12 v, i l = 100 ma 0.05 %/w t = 10 ms output noise v noise f = 10 hzC100 khz, @ t a = +25 c v out = 3.3 v 75 m v rms v out = 5 v 110 m v rms notes 1 ambient temperature of 1 85 c corresponds to a typical junction temperature of +125 c. specifications subject to change without notice. adp3302-3.0Cspecifications parameter symbol conditions min typ max units output voltage v out1 or v in = 3.3 v to 12 v 2.976 3 3.024 v v out2 i l = 0.1 ma to 100 ma t a = +25 c v in = 3.3 v to 12 v 2.958 3 3.042 v i l = 0.1 ma to 100 ma line regulation v in = 3.3 v to 12 v 0.024 mv/v t a = +25 c, i l = 0.1 ma load regulation i l = 0.1 ma to 100 ma 0.030 mv/ma t a = +25 c cross regulation i l = 0.1 ma to 100 ma 1 m v/ma t a = +25 c or specifications subject to change without notice. (@ t a = C20 8 c to +85 8 c, v in = 7 v, c in = 0.47 m f, c out = 0.47 m f, unless otherwise noted) 1 d v o v o (@ t a = C20 8 c to +85 8 c, v in = 3.3 v, c in = 0.47 m f, c out = 0.47 m f, unless otherwise noted) d v o d v in d v o d i l d v 01 d i l 2 d v 02 d i l 1
C3C rev. 0 adp3302 adp3302-3.2Cspecifications parameter symbol conditions min typ max units output voltage v out1 or v in = 3.5 v to 12 v 3.174 3.2 3.226 v v out2 i l = 0.1 ma to 100 ma t a = +25 c v in = 3.5 v to 12 v 3.155 3.2 3.245 v i l = 0.1 ma to 100 ma line regulation v in = 3.5 v to 12 v 0.026 mv/v t a = +25 c, i l = 0.1 ma load regulation i l = 0.1 ma to 100 ma 0.032 mv/ma t a = +25 c cross regulation i l = 0.1 ma to 100 ma 1 m v/ma t a = +25 c or specifications subject to change without notice. adp3302-3.3Cspecifications parameter symbol conditions min typ max units output voltage v out1 or v in = 3.6 v to 12 v 3.273 3.3 3.327 v v out2 i l = 0.1 ma to 100 ma t a = +25 c v in = 3.6 v to 12 v 3.253 3.3 3.347 v i l = 0.1 ma to 100 ma line regulation v in = 3.6 v to 12 v 0.026 mv/v t a = +25 c, i l = 0.1 ma load regulation i l = 0.1 ma to 100 ma 0.033 mv/ma t a = +25 c cross regulation i l = 0.1 ma to 100 ma 1 m v/ma t a = +25 c or specifications subject to change without notice. adp3302-5.0Cspecifications parameter symbol conditions min typ max units output voltage v out1 or v in = 5.3 v to 12 v 4.960 5.0 5.040 v v out2 i l = 0.1 ma to 100 ma t a = +25 c v in = 5.3 v to 12 v 4.930 5.0 5.070 v i l = 0.1 ma to 100 ma line regulation v in = 5.3 v to 12 v 0.04 mv/v t a = +25 c, i l = 0.1 ma load regulation i l = 0.1 ma to 100 ma 0.05 mv/ma t a = +25 c cross regulation i l = 0.1 ma to 100 ma 1 m v/ma t a = +25 c or specifications subject to change without notice. (@ t a = C20 8 c to +85 8 c, v in = 3.5 v, c in = 0.47 m f, c out = 0.47 m f, unless otherwise noted) d v o d v in d v o d i l d v 01 d i l 2 d v 02 d i l 1 d v o d v in d v o d i l d v 01 d i l 2 d v 02 d i l 1 (@ t a = C20 8 c to +85 8 c, v in = 3.6 v, c in = 0.47 m f, c out = 0.47 m f, unless otherwise noted) d v o d v in d v o d i l d v 01 d i l 2 d v 02 d i l 1 (@ t a = C20 8 c to +85 8 c, v in = 5.3 v, c in = 0.47 m f, c out = 0.47 m f, unless otherwise noted)
C4C rev. 0 adp3302 warning! esd sensitive device caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the adp3302 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. absolute maximum ratings* input supply voltage . . . . . . . . . . . . . . . . . . . . C0.3 v to +16 v please note: pins 5 and 8 should be connected exter- nally for proper operation. shutdown input voltage . . . . . . . . . . . . . . . . . C0.3 v to +16 v error flag output voltage . . . . . . . . . . . . . . . . C0.3 v to +16 v power dissipation . . . . . . . . . . . . . . . . . . . . internally limited operating ambient temperature range . . . . C55 c to +125 c operating junction temperature range . . . . C55 c to +125 c q ja . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 c/w q jc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 c/w storage temperature range . . . . . . . . . . . . . C65 c to +150 c lead temperature range (soldering 10 sec) . . . . . . . . +300 c vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220 c *this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. ordering guide voltage package model outputs option* adp3302ar1 out 1 3.0 v so-8 out 2 3.0 v so-8 adp3302ar2 out 1 3.2 v so-8 out 2 3.2 v so-8 adp3302ar3 out 1 3.3 v so-8 out 2 3.3 v so-8 ADP3302AR4 out 1 3.3 v so-8 out 2 5.0 v so-8 adp3302ar5 out 1 5.0 v so-8 out 2 5.0 v so-8 notes *so = small outline package. contact factory for availability of customized options available with mixed output voltages. pin function descriptions pin name function 1 out1 output of regulator 1, fixed 3.0 v, 3.2 v, 3.3 v or 5 v output voltage. sources up to 200 ma. bypass to ground with a 0.47 m f capacitor. 2 err open collector output. active low indicates that one of the two outputs is about to go out of regulation. 3 gnd ground pin. 4 out2 output regulator 2. independent of regula- tor 1. fixed 3.0 v, 3.2 v, 3.3 v or 5 v output voltage. bypass to ground with a 0.47 m f capacitor. 5, 8 in regulator input. supply voltage can range from 1 3.0 v to 1 12 v. pins 5 and 8 must be connected together for proper operation. 6 sd2 active low shutdown pin for regulator 2. connect to ground to disable the out 2 out- put. when shutdown is not used, this pin should be connected to the input pin. 7 sd1 shutdown pin for regulator 1, otherwise identical to sd2. pin configuration in sd1 sd2 in out 1 err gnd out 2 1 2 3 4 8 7 6 5 top view (not to scale) adp3302
C5C rev. 0 adp3302 input voltage ?volts 5.1 output voltage ?volts 616 8101214 5.001 5 4.999 4.998 4.997 4.996 4.995 5.5 5.4 5.3 5.2 i l = 0ma i l = 1ma i l = 20ma i l = 100ma figure 2. line regulation output voltage vs. supply voltage on adp3302ar5 output load ?ma ground current ?ma 0 050 100 150 200 4 3 2 1 5 i l1 = 0 to 200ma i l2 = 0 to 200ma i l1 = 0 to 200ma i l2 = 0ma v in = 7v figure 5. quiescent current vs. load current output load ?ma input-output voltage ?mv 250 200 0 0 20 200 40 60 80 100 120 140 160 180 150 100 50 figure 8. dropout voltage vs. output current typical performance characteristicsC output load ?ma output voltage ?volts 5.005 5.000 4.980 025 50 75 4.995 4.990 4.985 v in = 7v 100 125 150 175 200 figure 3. o utput voltage vs. load cur rent up to 200 ma on adp3302ar5 temperature ? c output voltage ?% 0.2 ?.4 ?5 ?5 135 ? 15 35 75 95 115 55 0.1 0.0 ?.1 ?.2 ?.3 i l = 0 figure 6. output voltage variation % vs. temperature input voltage ?volts 5 0 03 0 432 4 2 1 3 2 11 input/output voltage ?volts r l = 33 w figure 9. power-up/power-down on adp3302ar3. sd = 3 v or v in input voltage ?volts 1 ground current ?ma 316 5 7 9 11 13 1.6 0.0 1.4 0.8 0.6 0.4 0.2 1.2 1.0 i l = i l2 =0 figure 4. quiescent current vs. supply voltageCadp3302ar3 temperature ? c ground current ?? 3000 0 ?5 ?5 135 ? 15 35 75 95 115 55 2500 2000 1500 1000 500 i l1 = 100ma i l2 = 100ma i l1 = 100ma i l2 = 0ma i l1 = 0ma i l2 = 0ma figure 7. quiescent current vs. temperature time ?? 0 0 100 200 2.0 v sd = v in c l = 0.47? r l = 33 w 1.0 3.0 4.0 5.0 6.0 7.0 8.0 20 input/output voltage ?volts 40 60 80 120 140 160 180 v in v out figure 10. power-up transient on adp3302ar1
C6C rev. 0 adp3302 Ctypical performance characteristics volts time ?? 3.31 7 0 40 400 80 120 160 200 240 280 320 360 3.3 3.29 3.3 7.5 3.31 3.29 3.3k w , 0.47? load 33 w , 0.47? load v in figure 11. line transient response (0.47 m f load) on ADP3302AR4 5.01 volts volts time ?? 3.302 0 0 1000 200 400 600 800 3.3 3.298 5 100 i (v out2 ) 100ma 4.99 ma 5.03 4.97 v out1 v out2 c l = 10? figure 14. load transient on v out2 and crosstalk on v out1 on ADP3302AR4 for 1 ma to 100 ma pulse time ?? volts 4 1 05 50 10 15 20 25 30 35 40 45 3 2 0 0 5 v out v sd c = 0.47? r = 33 w on 3.3v output figure 17. turn off on adp3302ar3 5.002 5 4.998 volts time ?? 3.305 0 0 1000 200 400 600 800 3.3 3.295 100 volts ma i (v out1 ) 100ma v out1 v out2 c l = 0.47? figure 13. load transient on v out1 and crosstalk of v out2 on ADP3302AR4 for 1 ma to 100 ma pulse volts time ?? 5 0 0 20 200 40 60 80 100 120 140 160 180 4 3 1 5 2 0 volts 3v c l = 4.7? c l = 0.47? r l = 33 w 3.3v figure 16. turn on adp3302ar3 frequency = hz voltage noise spectral density ??/ hz 0.8 0.6 0 102 103 105 104 0.4 0.2 a. 0.47? @ no load b. 0.47? @ 33 w c. 10? @ no load d. 10? @ 33 w 0.47? bypass pin 5, 8 to pin 3 d b a c b d a c figure 19. output noise density on adp3302ar5 volts time ?? 3.31 7.5 0 40 400 80 120 160 200 240 280 320 360 3.3 3.29 3.3 3.31 3.29 3.3k w , 10? load 33 w , 10? load v in 7 figure 12. line transient response (10 m f load) on ADP3302AR4 volts time ?sec 3.5 0 05 12 3 4 0 300 100 400 200 3.3v ma figure 15. short circuit current frequency ?hz ripple rejection ?db 0 ?00 10 100 10m 1k 10k 100k 1m ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 a. 0.47? @ no load b. 0.47? @ 33 w c. 10? @ no load d. 10? @ 33 w b d a c b d a c figure 18. power supply ripple rejection on adp3302ar3
C7C rev. 0 adp3302 application information anycap ? the adp3302 is an easy to use dual low dropout voltage regulator. the adp3302 requires only a very small 0.47 m f bypass capacitor on the outputs for stability. unlike the conventional ldo designs, the adp3302 is stable with virtually any type of capacit ors (anycap?) independent of the capacitors esr (effective series resista nce) value. capacitor selection output capacitors: as with any micropower device, output transient response is a function of the output capacitance. the adp3302 is stable with a wide range of capacitor values, types and esr (anycap?). a capacitor as low as 0.47 m f is all that is needed for stability. however, larger capacitors can be used if high output current surges are anticipated. the adp3302 is stable with extremely low esr capacitors (esr ? 0), such as multilayer ceramic capacitors (mlcc) or oscon. input bypass capacitor: an input bypass capacitor is not required. however, for applications where the input source is high impedance or far from the input pins, a bypass capacitor is recommended. connecting a 0.47 m f capacitor from the input pins (pins 5 and 8) to ground reduces the circuits sensitivity to pc board layout. low esr capacitors offer better performance on a noisy supply; however, for less demanding requirements a standard tantalum or aluminum electrolytic capacitor is adequate. thermal overload protection the adp3302 is protected against damage due to excessive power dissipation by its thermal overload protection circuit, which limits the die temperature to a maximum of 165 c. under extreme conditions (i.e., high ambient temperature and power dissipation) where die temperature starts to rise above 165 c, the output current is reduced until the die temperature has dropped to a safe level. the output current is restored when the die temperature is reduced. current and thermal limit protections are intended to protect the device against accidental overload conditions. for normal operation, device power dissipation should be externally limited so that junction temperatures will not exceed 125 c. calculating junction temperature device power dissipation is calculated as follows: pd = ( v in C v out 1 ) i load 1 + (v in C v out 2 ) i load 2 + ( v in ) i gnd where i load 1 and i load 2 are load currents on outputs 1 and 2, i gnd is ground current, v in and v out are input and output voltages respectively. assuming i load 1 = i load 2 = 100 ma , i gnd = 2 ma, v in = 7.2 v and v out 1 = v out 2 = 5.0 v , device power dissipation is: pd = (7.2 v C 5 v ) 100 ma + (7.2 v C 5 v ) 100 ma + (7.2 v ) 2 ma = 0.454 w the pro prietary thermal coastline lead frame used in the adp3302 yields a thermal resistance of 96 c/w, which is signi- ficantly lower than a standard 8-pin soic package at 170 c/w. junction temperature above ambient temperature will be approximately equal to: 0.454 w 3 96 c/w = 43.6 c to limit the maximum junction temperature to 125 c, maxi- mum ambient temperature must be lower than: ta max = 125 c 2 43.6 c = 81.4 c printed circuit board layout consideration all surface mount packages rely on the traces of the pc board to conduct heat away from the package. in standard packages the dominant component of the heat resistance path is the plastic between the die attach pad and the individual leads. in typical thermally enhanced packages one or more of the leads are fused to the die attach pad, significantly decreasing this component. however, to make the improvement meaningful, a significant copper area on the pcb has to be attached to these fused pins. the adp3302s patented thermal coastline lead frame design uniformly minimizes the value of the dominant portion of the thermal resistance. it ensures that heat is conducted away by all pins of the package. this yields a very low 96 c/w thermal resistance for an so-8 package, without any special board lay- out requirements, relying just on the normal traces connected to the leads. the thermal resistance can be decreased by, approxi- mately, an additional 10% by attaching a few square cm of copper area to the two v in pins of the adp3302 package. it is not recommended to use solder mask or silkscreen on the pcb traces adjacent to the adp3302 pins since it will increase the junction to ambient thermal resistance of the package. shutdown mode applying a ttl high signal to the shutdown pin or tying it to the input pin will turn the output on. pulling the shutdown pin down to a ttl low signal or tying it to ground will turn the output off. outputs are independently controlled. in shutdown mode, quiescent current is reduced to less than 2 m a. error flag dropout detector the adp3302 will maintain its output voltage over a wide range of load, input voltage and temperature conditions. if regulation is lost, for example, by reducing the supply voltage below the combined regulated output and dropout voltages, the error flag will be activated. the err output is an open collector, which will be driven low. once set, the error flags hysteresis will keep the output low until a small margin of operating range is restored, either by raising the supply voltage or reducing the load. a single err pin serves both regulators in the adp3302 and indicates that one or both regulators are on the verge of losing regulation. application circuit dual post regulator circuit for switching regulators the adp3302 can be used to implement a dual 3 v/100 ma post regulator power supply from a 1 cell li-ion input (figure 20). this circuit takes 2.5 v to 4.2 v as the input and delivers dual 3 v/100 ma outputs. figure 21 shows the typical efficiency curve. for ease of explanation, lets partition the circuit into the adp3000 step-up regulator section and the adp3302 low dropout regulation section. furthermore, lets divide the operation of this application circuit into the following three phases.
C8C c2989-12-1/97 printed in u.s.a. phase one: when the input voltage is equal to 3.7 v or higher, the adp3000 is off and the adp3302 operates on its own to regulate the output voltage. at this phase, current is flowing into the input pins of the adp3302 via the inductor l1 and the schottky diode. at the same time, the adp3000 is set into sleep mode by pulling the fb pin (via r9 and r10 resistor divider network) to about 10% higher than its internal reference which is set to be 1.245 v. phase two: as the input voltage drops below 3.7 v, the decreasing input voltage causes the voltage of the fb pin to be within 5% of the 1.245 v reference. this triggers the adp3000 to turn on, providing a 3.4 v regulated output to the inputs of the adp3302. the adp3000 continues to supply the 3.4 v regulated voltage to the adp3302 until the input voltage drops below 2.5 v. phase three: when the input voltage drops below 2.5 v, the adp3302 will shut down and the adp3000 will go into sleep mode. with the input voltage below 2.5 v, the resistor divider network, r1 and r2, applies a voltage that is lower than the adp3000s internal 1.245 v reference voltage to the set pin. this causes the a o pin to have a voltage close to 0 v, which causes the adp3302 to go into shutdown directly and q1 to turn on and pull the fb pin 10% or higher than the internal 1.245 v reference voltage. with the fb pin pulled high, the adp3000 goes into sleep mode. 80 75 70 65 % efficiency at v in 2.5v shdn iq = 500? i o = 50ma + 50ma i o = 100ma + 100ma 2.6 3.0 3.4 3.8 4.2 v in (v) figure 21. typical efficiency of the circuit of figure 20 refer to figure 20. r9 and r10 set the output voltage of the adp3000. r1, r2, and r3 set the shutdown threshold voltage for the circuit. for further details on the adp3000, please refer to the adp3000 data sheet. supply sequencing circuit figure 22 shows a simple and effective way to achieve sequenc- ing of two different output voltages, 3.3 v and 5 v, in a mixed supply voltage system. in most cases, these systems need careful sequencing for the supplies to avoid latchup. at turn-on, d1 rapidly charges up c1 and enables the 5 v out- put. after a r2-c2 time constant delay, the 3.3 v output is enabled. at turn-off, d2 quickly discharges c2 and r3 pulls sd1 low, turning off the 3.3 v output first. after a r1-c1 time constant delay, the 5 v output turns off. adp3302 2 out1 in 1 8 err v out1 3.3v c5 1? 5 v in = 6v to 12v gnd sd1 in out2 v out2 5.0v sd2 c2 0.01? c1 0.01? c4 0.5? c3 0.5? on/off 3.3v d2 d1 r2 220k w r1 220k w d3 r3 330k w 4 7 6 3 figure 22. t urn-on/turn-off sequencing for mixed supply voltages outline dimensions dimensions shown in inches and (mm). 8-pin soic (so-8) 0.1968 (5.00) 0.1890 (4.80) 8 5 4 1 0.2440 (6.20) 0.2284 (5.80) pin 1 0.1574 (4.00) 0.1497 (3.80) 0.0688 (1.75) 0.0532 (1.35) seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) x 45 rev. 0 adp3302 3v 100ma 3v 100ma 1? 6v (mlc) 1? 6v (mlc) c4 c5 in in sd gnd v o2 v o2 adp3302 c3 100? 10v avx-tps r9 348k w 1% r10 200k w 1% in5817 l1 6.6? (sumida?drh62) q1 2n2907 r5 330k w r6 100k w r8 10k w r7 90k w c2 33nf r4 120k w r1 100k w c1 100? 10v avx-tps r3 1m w r2 90k w 2.5v ? 4.2v v in i lim set a o gnd sw2 sw1 fb adp3000 figure 20. cell li-ion to 3 v/200 ma converter with shutdown at v in < 2.5 v
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